1. Field of the Invention
This invention relates to an improvement in a semiconductor device, and more particularly to an improvement in a technique for isolation between element regions.
2. Description of the Related Art
In general, in a semiconductor integrated circuit, a plurality of element regions which are electrically isolated from one another are formed in the main surface of a semiconductor substrate and active elements and passive elements are formed in the element regions.
As a method of isolating the element regions from one another, an isolation technique using PN junctions, an isolation technique using oxide films, and an isolation technique using grooves are known. The conventional semiconductor device and the method for manufacturing the same are explained below by using the isolation technique using oxide films as an example. FIG. 1 shows the conventional semiconductor integrated circuit in which the isolation technique using the oxide films is used.
In a silicon substrate 1, element regions 2a, 2b, . . . are formed. The element regions 2a, 2b, . . . are surrounded by grooves 3a, 3b, . . . . An oxide film 4 is formed on the field region and the internal surfaces of the grooves 3a, 3b, . . . . Polysilicon layers 5 are buried in the grooves 3a, 3b, . . . in which the oxide film 4 is formed. Thin cap oxide films 6 are formed on the grooves 3a, 3b, . . . in which the polysilicon layers 5 are buried.
The element isolation in the above semiconductor integrated circuit is effected as follows.
First, the grooves 3a, 3b, . . . surrounding the element regions 2 are formed in the silicon substrate 1 by an anisotropic etching technique. Then, a non-oxide film (Si.sub.3 N.sub.4) such as a nitride film is formed on the element regions 2. After this, the oxide film 4 is formed on the field region and the internal surfaces of the grooves 3a, 3b, . . . with the non-oxide film used as a mask. After formation of the oxide film 4, the polysilicon layers 5 are buried in the grooves 3a, 3b, . . . . Further, the polysilicon layers 5 are made flat and then the thin cap oxide films 6 are formed on the grooves.
In the integrated circuit thus formed, a distance W.sub.TT between the side wall of the groove 3a and the side wall of the groove 3b is designed to a minimum possible length in order to enhance the integration density of the elements.
However, it is generally known that as the distance between the grooves becomes shorter, thermal stress is more concentrated on the corner portions of the grooves 3a, 3b, . . . in the oxidation process for forming the oxide films 4 on the field region and the internal surfaces of the grooves 3a, 3b, . . . . More specifically, as shown in FIG. 2, dislocation defects 9 may be caused in the upper corner portions 7 and bottom corner portions 8 because of the concentration of thermal stress at the time of oxidation. The dislocation defects 9 increase leak current between the collectors of transistors formed in the silicon substrate. Further, the transistor characteristic such as the I.sub.C (collector current)-h.sub.FE (grounded emitter current amplification factor) characteristic will be deteriorated. That is, if the dislocation defects 9 occur at a certain density, recombination current around the defect increases to deteriorate the element characteristic and element isolation characteristic, making the semiconductor device definitely impractical.